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Random telegraph signals in semiconductor devices
Title statement Random telegraph signals in semiconductor devices / Eddy Simoen, Cor Claeys. [elektronický zdroj] Publication Bristol [England] (Temple Circus, Temple Way, Bristol BS1 6HG, UK) : IOP Publishing, [2016] Phys.des. 1 online resource (various pagings) : illustrations (some color). ISBN 9780750312721 (online) 9780750312745 mobi Edition [IOP release 3] IOP expanding physics, ISSN 2053-2563 Note "Version: 20161001"--Title page verso. Internal Bibliographies/Indexes Note Includes bibliographical references. Contents Preface -- 1. Introduction Content note 2. Random telegraph signal phenomenology -- 2.1. RTS time constants -- 2.2. RTS amplitude behavior -- 2.3. RTS in the gate current of a MOS device -- 2.4. RTS in the junction leakage current of a MOSFET -- 2.5. Multiple and complex. 3. RTS modeling, simulation and parameter extraction -- 3.1. Time constant modeling and simulation -- 3.2. Extraction trap position from RTS time constants -- 3.3. RTS amplitude modeling -- 3.4. Atomistic numerical modeling of the RTS amplitude -- 3.5. Novel measurement and analysis methods -- 3.6. Ab initio modeling of RTS in gate dielectrics. 4. Impact device processing and scaling on RTS -- 4.1. Processing effects on RTS -- 4.2. RTS in fin-type architectures -- 4.3. Nanometric scaling aspects of RTS -- 4.4. RTS in ‘beyond-silicon' devices. 5. Operational and reliability aspects of RTS -- 5.1. Switching AC operation of RTS -- 5.2. Impact of uniform and HC degradation -- 5.3. BTI and RTS: oxide trapping? -- 5.4. Statistical RTS measurement methods -- 5.5. Device and circuit simulation of dynamic variability. 6. RTS in memory and imager circuits -- 6.1. RTS in flash and SRAM cells -- 6.2. RTS in DRAM and logic circuits -- 6.3. RTS in novel ReRAM and PCMs -- 6.4. RTS in CMOS imagers and CCDs -- 7. General conclusions. Notes to Availability Přístup pouze pro oprávněné uživatele Audience Researcher, practitioner. Note Způsob přístupu: World Wide Web.. Požadavky na systém: Adobe Acrobat Reader. Another responsib. Claeys, Cor L., Another responsib. Institute of Physics (Great Britain), Subj. Headings Semiconductors - Noise. * Electricity, electromagnetism and magnetism. * Electronic devices & materials. * TECHNOLOGY & ENGINEERING / Electronics / Semiconductors. * SCIENCE / Nanoscience. * SCIENCE / Physics / Condensed Matter. Form, Genre elektronické knihy electronic books Country Anglie Language angličtina Document kind Electronic books URL Plný text pro studenty a zaměstnance UPOL 
book
Following their first observation in 1984, random telegraph signals (RTSs) were initially a purely scientific tool to study fundamental aspects of defects in semiconductor devices. As semiconductor devices move to the nanoscale however, RTSs have become an issue of major concern to the semiconductor industry, both in development of current technology, such as memory devices and logic circuits, as well as in future semiconductor devices beyond the silicon roadmap, such as nanowire, TFET and carbon nanotube-based devices. It has become clear that the reliability of state-of-the-art and future CMOS technology nodes is dominated by RTS and single trap phenomena, and so its understanding is of vital importance for the modelling and simulation of the operation and the expected lifetime of CMOS devices and circuits. It is the aim of this book to provide a comprehensive and up-to-date review of one of the most challenging issues facing the semiconductor industry, from the fundamentals of RTSs to applied technology.
Preface -- 1. Introduction2. Random telegraph signal phenomenology -- 2.1. RTS time constants -- 2.2. RTS amplitude behavior -- 2.3. RTS in the gate current of a MOS device -- 2.4. RTS in the junction leakage current of a MOSFET -- 2.5. Multiple and complex3. RTS modeling, simulation and parameter extraction -- 3.1. Time constant modeling and simulation -- 3.2. Extraction trap position from RTS time constants -- 3.3. RTS amplitude modeling -- 3.4. Atomistic numerical modeling of the RTS amplitude -- 3.5. Novel measurement and analysis methods -- 3.6. Ab initio modeling of RTS in gate dielectrics4. Impact device processing and scaling on RTS -- 4.1. Processing effects on RTS -- 4.2. RTS in fin-type architectures -- 4.3. Nanometric scaling aspects of RTS -- 4.4. RTS in ‘beyond-silicon' devices5. Operational and reliability aspects of RTS -- 5.1. Switching AC operation of RTS -- 5.2. Impact of uniform and HC degradation -- 5.3. BTI and RTS: oxide trapping? -- 5.4. Statistical RTS measurement methods -- 5.5. Device and circuit simulation of dynamic variability6. RTS in memory and imager circuits -- 6.1. RTS in flash and SRAM cells -- 6.2. RTS in DRAM and logic circuits -- 6.3. RTS in novel ReRAM and PCMs -- 6.4. RTS in CMOS imagers and CCDs -- 7. General conclusions.
Number of the records: 1